arm64: dts: mediatek: mt8195-cherry: Mark USB 3.0 on xhci1 as disabled
authorChen-Yu Tsai <wenst@chromium.org>
Wed, 31 Jul 2024 03:44:08 +0000 (11:44 +0800)
committerAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Wed, 31 Jul 2024 08:17:04 +0000 (10:17 +0200)
USB 3.0 on xhci1 is not used, as the controller shares the same PHY as
pcie1. The latter is enabled to support the M.2 PCIe WLAN card on this
design.

Mark USB 3.0 as disabled on this controller using the
"mediatek,u3p-dis-msk" property.

Reported-by: NĂ­colas F. R. A. Prado <nfraprado@collabora.com> #KernelCI
Closes: https://lore.kernel.org/all/9fce9838-ef87-4d1b-b3df-63e1ddb0ec51@notapiano/
Fixes: b6267a396e1c ("arm64: dts: mediatek: cherry: Enable T-PHYs and USB XHCI controllers")
Cc: stable@vger.kernel.org
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20240731034411.371178-2-wenst@chromium.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi

index 20dfa18c9dda0a60932bd58221260f4dad9e76b1..d535fa6dc9d3833d23438c26e5c4db5ce1ff33f0 100644 (file)
        rx-fifo-depth = <3072>;
        vusb33-supply = <&mt6359_vusb_ldo_reg>;
        vbus-supply = <&usb_vbus>;
+       mediatek,u3p-dis-msk = <1>;
 };
 
 &xhci2 {