drm/imagination: Rename event_mask -> status_mask

Now that enable_reg isn't used, rename the previously shared event_mask to
status_mask since it's only used with status_reg.

Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Link: https://lore.kernel.org/r/20250410-sets-bxs-4-64-patch-v1-v6-9-eda620c5865f@imgtec.com
Signed-off-by: Matt Coster <matt.coster@imgtec.com>

diff --git a/drivers/gpu/drm/imagination/pvr_fw.h b/drivers/gpu/drm/imagination/pvr_fw.h
index 29bae4bc244a243a6a95bcf838d924060cc043e2..eead744835726712622d5aba9b3480fe264a089f 100644 (file)
--- a/drivers/gpu/drm/imagination/pvr_fw.h
+++ b/drivers/gpu/drm/imagination/pvr_fw.h
@@ -199,8 +199,8 @@ struct pvr_fw_defs {
                 */
                u32 clear_reg;
 
-               /** @event_mask: Bitmask of events to listen for in the status_reg. */
-               u32 event_mask;
+               /** @status_mask: Bitmask of events to listen for in the status_reg. */
+               u32 status_mask;
 
                /** @clear_mask: Value to write to the clear_reg in order to clear FW IRQs. */
                u32 clear_mask;
@@ -404,7 +404,7 @@ struct pvr_fw_device {
        pvr_cr_write32((pvr_dev), (pvr_dev)->fw_dev.defs->irq.name ## _reg, value)
 
 #define pvr_fw_irq_pending(pvr_dev) \
-       (pvr_fw_irq_read_reg(pvr_dev, status) & (pvr_dev)->fw_dev.defs->irq.event_mask)
+       (pvr_fw_irq_read_reg(pvr_dev, status) & (pvr_dev)->fw_dev.defs->irq.status_mask)
 
 #define pvr_fw_irq_clear(pvr_dev) \
        pvr_fw_irq_write_reg(pvr_dev, clear, (pvr_dev)->fw_dev.defs->irq.clear_mask)

diff --git a/drivers/gpu/drm/imagination/pvr_fw_meta.c b/drivers/gpu/drm/imagination/pvr_fw_meta.c
index 77596a2a6c4e9c9e2b3af6b9b2aea3ad49062550..892823826bf235362d6ae12b34541cea1e10e1d0 100644 (file)
--- a/drivers/gpu/drm/imagination/pvr_fw_meta.c
+++ b/drivers/gpu/drm/imagination/pvr_fw_meta.c
@@ -549,7 +549,7 @@ const struct pvr_fw_defs pvr_fw_defs_meta = {
        .irq = {
                .status_reg = ROGUE_CR_META_SP_MSLVIRQSTATUS,
                .clear_reg = ROGUE_CR_META_SP_MSLVIRQSTATUS,
-               .event_mask = ROGUE_CR_META_SP_MSLVIRQSTATUS_TRIGVECT2_EN,
+               .status_mask = ROGUE_CR_META_SP_MSLVIRQSTATUS_TRIGVECT2_EN,
                .clear_mask = ROGUE_CR_META_SP_MSLVIRQSTATUS_TRIGVECT2_CLRMSK,
        },
 };

diff --git a/drivers/gpu/drm/imagination/pvr_fw_mips.c b/drivers/gpu/drm/imagination/pvr_fw_mips.c
index c73902bcf8e46ee58174a503cc7f235f2d45d180..567251a663de1dd179159c27288308364619e8dc 100644 (file)
--- a/drivers/gpu/drm/imagination/pvr_fw_mips.c
+++ b/drivers/gpu/drm/imagination/pvr_fw_mips.c
@@ -243,7 +243,7 @@ const struct pvr_fw_defs pvr_fw_defs_mips = {
        .irq = {
                .status_reg = ROGUE_CR_MIPS_WRAPPER_IRQ_STATUS,
                .clear_reg = ROGUE_CR_MIPS_WRAPPER_IRQ_CLEAR,
-               .event_mask = ROGUE_CR_MIPS_WRAPPER_IRQ_STATUS_EVENT_EN,
+               .status_mask = ROGUE_CR_MIPS_WRAPPER_IRQ_STATUS_EVENT_EN,
                .clear_mask = ROGUE_CR_MIPS_WRAPPER_IRQ_CLEAR_EVENT_EN,
        },
 };