drm/amdgpu: sync ring type and drm hw_ip type
authorNirmoy Das <nirmoy.das@amd.com>
Tue, 31 Mar 2020 11:29:08 +0000 (13:29 +0200)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 9 Apr 2020 14:43:14 +0000 (10:43 -0400)
Use AMDGPU_HW_IP_* to set amdgpu_ring_type enum values

Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h

index 9a443013d70d5d4a94099206eb84ecb1662f7b6a..4bae851e8d43794315e9f4b957af9fba5d38d0e8 100644 (file)
 #define to_amdgpu_ring(s) container_of((s), struct amdgpu_ring, sched)
 
 enum amdgpu_ring_type {
-       AMDGPU_RING_TYPE_GFX,
-       AMDGPU_RING_TYPE_COMPUTE,
-       AMDGPU_RING_TYPE_SDMA,
-       AMDGPU_RING_TYPE_UVD,
-       AMDGPU_RING_TYPE_VCE,
-       AMDGPU_RING_TYPE_KIQ,
-       AMDGPU_RING_TYPE_UVD_ENC,
-       AMDGPU_RING_TYPE_VCN_DEC,
-       AMDGPU_RING_TYPE_VCN_ENC,
-       AMDGPU_RING_TYPE_VCN_JPEG
+       AMDGPU_RING_TYPE_GFX            = AMDGPU_HW_IP_GFX,
+       AMDGPU_RING_TYPE_COMPUTE        = AMDGPU_HW_IP_COMPUTE,
+       AMDGPU_RING_TYPE_SDMA           = AMDGPU_HW_IP_DMA,
+       AMDGPU_RING_TYPE_UVD            = AMDGPU_HW_IP_UVD,
+       AMDGPU_RING_TYPE_VCE            = AMDGPU_HW_IP_VCE,
+       AMDGPU_RING_TYPE_UVD_ENC        = AMDGPU_HW_IP_UVD_ENC,
+       AMDGPU_RING_TYPE_VCN_DEC        = AMDGPU_HW_IP_VCN_DEC,
+       AMDGPU_RING_TYPE_VCN_ENC        = AMDGPU_HW_IP_VCN_ENC,
+       AMDGPU_RING_TYPE_VCN_JPEG       = AMDGPU_HW_IP_VCN_JPEG,
+       AMDGPU_RING_TYPE_KIQ
 };
 
 struct amdgpu_device;