wifi: iwlwifi: cfg: unify Qu/QuZ configs
authorJohannes Berg <johannes.berg@intel.com>
Fri, 2 May 2025 12:20:24 +0000 (15:20 +0300)
committerMiri Korenblit <miriam.rachel.korenblit@intel.com>
Tue, 6 May 2025 19:22:12 +0000 (22:22 +0300)
Now that the fw_name_mac is no longer around and derived
from the MAC type automatically, we no longer need to have
different configurations for Qu/QuZ. Combine them. For the
killer AX1650s/i, also fix the names, there was a mixup.

Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
Link: https://patch.msgid.link/20250502151751.957fbb5437ce.If51ad0b2c8afaaa131208125af3bc292793613bb@changeid
drivers/net/wireless/intel/iwlwifi/cfg/22000.c
drivers/net/wireless/intel/iwlwifi/iwl-config.h
drivers/net/wireless/intel/iwlwifi/iwl-drv.c
drivers/net/wireless/intel/iwlwifi/pcie/drv.c

index b2d24a49234c825004da61480d50d2fb8bb79b82..ac137c82f7c59a7c0d54210536dce535e8b0a23a 100644 (file)
@@ -245,54 +245,6 @@ const struct iwl_cfg iwl_ax201_cfg_qu_hr = {
        .num_rbds = IWL_NUM_RBDS_22000_HE,
 };
 
-const struct iwl_cfg iwl_quz_hr1 = {
-       IWL_DEVICE_22500,
-       /*
-        * This device doesn't support receiving BlockAck with a large bitmap
-        * so we need to restrict the size of transmitted aggregation to the
-        * HT size; mac80211 would otherwise pick the HE max (256) by default.
-        */
-       .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
-       .tx_with_siso_diversity = true,
-       .num_rbds = IWL_NUM_RBDS_22000_HE,
-};
-
-const struct iwl_cfg iwl_ax201_cfg_quz_hr = {
-       .name = "Intel(R) Wi-Fi 6 AX201 160MHz",
-       IWL_DEVICE_22500,
-       /*
-         * This device doesn't support receiving BlockAck with a large bitmap
-         * so we need to restrict the size of transmitted aggregation to the
-         * HT size; mac80211 would otherwise pick the HE max (256) by default.
-         */
-       .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
-       .num_rbds = IWL_NUM_RBDS_22000_HE,
-};
-
-const struct iwl_cfg iwl_ax1650s_cfg_quz_hr = {
-       .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)",
-       IWL_DEVICE_22500,
-       /*
-         * This device doesn't support receiving BlockAck with a large bitmap
-         * so we need to restrict the size of transmitted aggregation to the
-         * HT size; mac80211 would otherwise pick the HE max (256) by default.
-         */
-       .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
-       .num_rbds = IWL_NUM_RBDS_22000_HE,
-};
-
-const struct iwl_cfg iwl_ax1650i_cfg_quz_hr = {
-       .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)",
-       IWL_DEVICE_22500,
-       /*
-         * This device doesn't support receiving BlockAck with a large bitmap
-         * so we need to restrict the size of transmitted aggregation to the
-         * HT size; mac80211 would otherwise pick the HE max (256) by default.
-         */
-       .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
-       .num_rbds = IWL_NUM_RBDS_22000_HE,
-};
-
 const struct iwl_cfg iwl_ax200_cfg_cc = {
        .fw_name_pre = IWL_CC_A_FW_PRE,
        IWL_DEVICE_22500,
@@ -306,7 +258,7 @@ const struct iwl_cfg iwl_ax200_cfg_cc = {
 };
 
 const struct iwl_cfg killer1650s_2ax_cfg_qu_hr = {
-       .name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201NGW)",
+       .name = iwl_ax201_killer_1650s_name,
        IWL_DEVICE_22500,
        /*
         * This device doesn't support receiving BlockAck with a large bitmap
@@ -318,18 +270,7 @@ const struct iwl_cfg killer1650s_2ax_cfg_qu_hr = {
 };
 
 const struct iwl_cfg killer1650i_2ax_cfg_qu_hr = {
-       .name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201D2W)",
-       IWL_DEVICE_22500,
-       /*
-        * This device doesn't support receiving BlockAck with a large bitmap
-        * so we need to restrict the size of transmitted aggregation to the
-        * HT size; mac80211 would otherwise pick the HE max (256) by default.
-        */
-       .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
-       .num_rbds = IWL_NUM_RBDS_22000_HE,
-};
-
-const struct iwl_cfg iwl_cfg_quz_hr = {
+       .name = iwl_ax201_killer_1650i_name,
        IWL_DEVICE_22500,
        /*
         * This device doesn't support receiving BlockAck with a large bitmap
index 82ca7faf3fe0058b75bf80981b4d71e05659ccc2..127d4dd548acaf34029d5720e42cc96fb8bd6514 100644 (file)
@@ -623,13 +623,9 @@ extern const struct iwl_cfg iwl9560_qu_jf_cfg;
 extern const struct iwl_cfg iwl9560_quz_a0_jf_b0_cfg;
 extern const struct iwl_cfg iwl9560_2ac_cfg_soc;
 extern const struct iwl_cfg iwl_qu_hr1;
-extern const struct iwl_cfg iwl_quz_hr1;
 extern const struct iwl_cfg iwl_qu_hr;
 extern const struct iwl_cfg iwl_ax200_cfg_cc;
 extern const struct iwl_cfg iwl_ax201_cfg_qu_hr;
-extern const struct iwl_cfg iwl_ax201_cfg_quz_hr;
-extern const struct iwl_cfg iwl_ax1650i_cfg_quz_hr;
-extern const struct iwl_cfg iwl_ax1650s_cfg_quz_hr;
 extern const struct iwl_cfg killer1650s_2ax_cfg_qu_hr;
 extern const struct iwl_cfg killer1650i_2ax_cfg_qu_hr;
 extern const struct iwl_cfg killer1650x_2ax_cfg;
@@ -644,7 +640,6 @@ extern const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0_long;
 extern const struct iwl_cfg iwl_cfg_ma;
 
 extern const struct iwl_cfg iwl_cfg_so_a0_hr_a0;
-extern const struct iwl_cfg iwl_cfg_quz_hr;
 #endif /* CONFIG_IWLMVM */
 
 #if IS_ENABLED(CONFIG_IWLMLD)
index 0b208d973585b46e63fd4bf674b662e1a8ec382d..7ff97fb71905681e7a025dd68c8f69ad30175cc9 100644 (file)
@@ -201,6 +201,8 @@ const char *iwl_drv_get_fwname_pre(struct iwl_trans *trans, char *buf)
                break;
        case IWL_CFG_MAC_TYPE_QUZ:
                mac = "QuZ";
+               /* all QuZ use A0 firmware */
+               mac_step = 'a';
                break;
        case IWL_CFG_MAC_TYPE_SO:
        case IWL_CFG_MAC_TYPE_SOF:
index 6852a2214936300c482f4ab8986a669b8a8930e1..deff291a43ca977cc943e8353e72c83c06007210 100644 (file)
@@ -685,43 +685,43 @@ VISIBLE_IF_IWLWIFI_KUNIT const struct iwl_dev_info iwl_dev_info_table[] = {
                     DEVICE(0xA0F0), SUBDEV(0x4070), BW_NO_LIMIT),
        IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
                     DEVICE(0xA0F0), SUBDEV(0x6074), BW_NO_LIMIT),
-       IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
+       IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
                     DEVICE(0x02F0), SUBDEV(0x0070), BW_NO_LIMIT),
-       IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
+       IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
                     DEVICE(0x02F0), SUBDEV(0x0074), BW_NO_LIMIT),
-       IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
+       IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
                     DEVICE(0x02F0), SUBDEV(0x6074), BW_NO_LIMIT),
-       IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
+       IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
                     DEVICE(0x02F0), SUBDEV(0x0078), BW_NO_LIMIT),
-       IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
+       IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
                     DEVICE(0x02F0), SUBDEV(0x007C), BW_NO_LIMIT),
-       IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
+       IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
                     DEVICE(0x02F0), SUBDEV(0x0310), BW_NO_LIMIT),
-       IWL_DEV_INFO(iwl_ax1650s_cfg_quz_hr, NULL,
+       IWL_DEV_INFO(killer1650s_2ax_cfg_qu_hr, NULL,
                     DEVICE(0x02F0), SUBDEV(0x1651), BW_NO_LIMIT),
-       IWL_DEV_INFO(iwl_ax1650i_cfg_quz_hr, NULL,
+       IWL_DEV_INFO(killer1650i_2ax_cfg_qu_hr, NULL,
                     DEVICE(0x02F0), SUBDEV(0x1652), BW_NO_LIMIT),
-       IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
+       IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
                     DEVICE(0x02F0), SUBDEV(0x2074), BW_NO_LIMIT),
-       IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
+       IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
                     DEVICE(0x02F0), SUBDEV(0x4070), BW_NO_LIMIT),
-       IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
+       IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
                     DEVICE(0x06F0), SUBDEV(0x0070), BW_NO_LIMIT),
-       IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
+       IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
                     DEVICE(0x06F0), SUBDEV(0x0074), BW_NO_LIMIT),
-       IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
+       IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
                     DEVICE(0x06F0), SUBDEV(0x0078), BW_NO_LIMIT),
-       IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
+       IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
                     DEVICE(0x06F0), SUBDEV(0x007C), BW_NO_LIMIT),
-       IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
+       IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
                     DEVICE(0x06F0), SUBDEV(0x0310), BW_NO_LIMIT),
-       IWL_DEV_INFO(iwl_ax1650s_cfg_quz_hr, NULL,
+       IWL_DEV_INFO(killer1650s_2ax_cfg_qu_hr, NULL,
                     DEVICE(0x06F0), SUBDEV(0x1651), BW_NO_LIMIT),
-       IWL_DEV_INFO(iwl_ax1650i_cfg_quz_hr, NULL,
+       IWL_DEV_INFO(killer1650i_2ax_cfg_qu_hr, NULL,
                     DEVICE(0x06F0), SUBDEV(0x1652), BW_NO_LIMIT),
-       IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
+       IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
                     DEVICE(0x06F0), SUBDEV(0x2074), BW_NO_LIMIT),
-       IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
+       IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
                     DEVICE(0x06F0), SUBDEV(0x4070), BW_NO_LIMIT),
        IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
                     DEVICE(0x34F0), SUBDEV(0x0070), BW_NO_LIMIT),
@@ -1025,11 +1025,11 @@ VISIBLE_IF_IWLWIFI_KUNIT const struct iwl_dev_info iwl_dev_info_table[] = {
                     RF_TYPE(HR2), BW_NO_LIMIT, NO_CDB),
 
        /* QuZ */
-       IWL_DEV_INFO(iwl_quz_hr1, iwl_ax101_name, MAC_TYPE(QUZ),
+       IWL_DEV_INFO(iwl_qu_hr1, iwl_ax101_name, MAC_TYPE(QUZ),
                     RF_TYPE(HR1), NO_CDB),
-       IWL_DEV_INFO(iwl_cfg_quz_hr, iwl_ax203_name, MAC_TYPE(QUZ),
+       IWL_DEV_INFO(iwl_qu_hr, iwl_ax203_name, MAC_TYPE(QUZ),
                     MAC_STEP(B), RF_TYPE(HR2), BW_LIMIT(80), NO_CDB),
-       IWL_DEV_INFO(iwl_cfg_quz_hr, iwl_ax201_name, MAC_TYPE(QUZ),
+       IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name, MAC_TYPE(QUZ),
                     MAC_STEP(B), RF_TYPE(HR2), BW_NO_LIMIT, NO_CDB),
 
 /* Ma */
@@ -1520,22 +1520,6 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
        if (cfg_7265d &&
            (iwl_trans->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_7265D)
                iwl_trans->cfg = cfg_7265d;
-
-       /*
-        * This is a hack to switch from QuZ to Qu C0.  We need to
-        * do this for all cfgs that use QuZ, except for those using
-        * Jf, which have already been moved to the new table.  The
-        * rest must be removed once we convert Qu with Hr as well.
-        */
-       if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_QUZ) {
-               if (iwl_trans->cfg == &iwl_ax201_cfg_qu_hr)
-                       iwl_trans->cfg = &iwl_ax201_cfg_quz_hr;
-               else if (iwl_trans->cfg == &killer1650s_2ax_cfg_qu_hr)
-                       iwl_trans->cfg = &iwl_ax1650s_cfg_quz_hr;
-               else if (iwl_trans->cfg == &killer1650i_2ax_cfg_qu_hr)
-                       iwl_trans->cfg = &iwl_ax1650i_cfg_quz_hr;
-       }
-
 #endif
        /*
         * If we didn't set the cfg yet, the PCI ID table entry should have