#include "xe_hw_engine.h"
#include "xe_mmio.h"
-static void gen3_assert_iir_is_zero(struct xe_gt *gt, i915_reg_t reg)
+static void assert_iir_is_zero(struct xe_gt *gt, i915_reg_t reg)
{
u32 val = xe_mmio_read32(gt, reg.reg);
xe_mmio_read32(gt, reg.reg);
}
-static void gen3_irq_init(struct xe_gt *gt,
- i915_reg_t imr, u32 imr_val,
- i915_reg_t ier, u32 ier_val,
- i915_reg_t iir)
+static void irq_init(struct xe_gt *gt,
+ i915_reg_t imr, u32 imr_val,
+ i915_reg_t ier, u32 ier_val,
+ i915_reg_t iir)
{
- gen3_assert_iir_is_zero(gt, iir);
+ assert_iir_is_zero(gt, iir);
xe_mmio_write32(gt, ier.reg, ier_val);
xe_mmio_write32(gt, imr.reg, imr_val);
xe_mmio_read32(gt, imr.reg);
}
-#define GEN3_IRQ_INIT(gt, type, imr_val, ier_val) \
- gen3_irq_init((gt), \
- type##IMR, imr_val, \
- type##IER, ier_val, \
- type##IIR)
+#define IRQ_INIT(gt, type, imr_val, ier_val) \
+ irq_init((gt), \
+ type##IMR, imr_val, \
+ type##IER, ier_val, \
+ type##IIR)
-static void gen3_irq_reset(struct xe_gt *gt, i915_reg_t imr, i915_reg_t iir,
+static void irq_reset(struct xe_gt *gt, i915_reg_t imr, i915_reg_t iir,
i915_reg_t ier)
{
xe_mmio_write32(gt, imr.reg, 0xffffffff);
xe_mmio_write32(gt, iir.reg, 0xffffffff);
xe_mmio_read32(gt, iir.reg);
}
-#define GEN3_IRQ_RESET(gt, type) \
- gen3_irq_reset((gt), type##IMR, type##IIR, type##IER)
+#define IRQ_RESET(gt, type) \
+ irq_reset((gt), type##IMR, type##IIR, type##IER)
static u32 gen11_intr_disable(struct xe_gt *gt)
{
gen11_gt_irq_postinstall(xe, gt);
- GEN3_IRQ_INIT(gt, GEN11_GU_MISC_, ~GEN11_GU_MISC_GSE,
- GEN11_GU_MISC_GSE);
+ IRQ_INIT(gt, GEN11_GU_MISC_, ~GEN11_GU_MISC_GSE, GEN11_GU_MISC_GSE);
gen11_intr_enable(gt, true);
}
{
gen11_gt_irq_postinstall(xe, gt);
- GEN3_IRQ_INIT(gt, GEN11_GU_MISC_, ~GEN11_GU_MISC_GSE,
- GEN11_GU_MISC_GSE);
+ IRQ_INIT(gt, GEN11_GU_MISC_, ~GEN11_GU_MISC_GSE, GEN11_GU_MISC_GSE);
if (gt->info.id == XE_GT0)
dg1_intr_enable(xe, true);
gen11_gt_irq_reset(gt);
- GEN3_IRQ_RESET(gt, GEN11_GU_MISC_);
- GEN3_IRQ_RESET(gt, GEN8_PCU_);
+ IRQ_RESET(gt, GEN11_GU_MISC_);
+ IRQ_RESET(gt, GEN8_PCU_);
}
static void dg1_irq_reset(struct xe_gt *gt)
gen11_gt_irq_reset(gt);
- GEN3_IRQ_RESET(gt, GEN11_GU_MISC_);
- GEN3_IRQ_RESET(gt, GEN8_PCU_);
+ IRQ_RESET(gt, GEN11_GU_MISC_);
+ IRQ_RESET(gt, GEN8_PCU_);
}
static void xe_irq_reset(struct xe_device *xe)