arm64: dts: imx93-11x11-evk: Add audio XCVR sound card

Add audio XCVR sound card, which supports SPDIF TX & RX only,
eARC RX, ARC RX are not supported.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
index 2273d318310f62d1d0b907f3a474682ed9b268df..ff2344b79cee8d98b917a779ee216ed83a27b99a 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
@@ -118,6 +118,19 @@
                        };
                };
        };
+
+       sound-xcvr {
+               compatible = "fsl,imx-audio-card";
+               model = "imx-audio-xcvr";
+
+               pri-dai-link {
+                       link-name = "XCVR PCM";
+
+                       cpu {
+                               sound-dai = <&xcvr>;
+                       };
+               };
+       };
 };
 
 &adc1 {
@@ -463,6 +476,18 @@
        status = "okay";
 };
 
+&xcvr {
+       pinctrl-names = "default", "sleep";
+       pinctrl-0 = <&pinctrl_spdif>;
+       pinctrl-1 = <&pinctrl_spdif_sleep>;
+       assigned-clocks = <&clk IMX93_CLK_SPDIF>,
+                        <&clk IMX93_CLK_AUDIO_XCVR>;
+       assigned-clock-parents = <&clk IMX93_CLK_AUDIO_PLL>,
+                        <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
+       assigned-clock-rates = <12288000>, <200000000>;
+       status = "okay";
+};
+
 &iomuxc {
        pinctrl_eqos: eqosgrp {
                fsl,pins = <
@@ -674,6 +699,20 @@
                >;
        };
 
+       pinctrl_spdif: spdifgrp {
+               fsl,pins = <
+                       MX93_PAD_GPIO_IO22__SPDIF_IN            0x31e
+                       MX93_PAD_GPIO_IO23__SPDIF_OUT           0x31e
+               >;
+       };
+
+       pinctrl_spdif_sleep: spdifsleepgrp {
+               fsl,pins = <
+                       MX93_PAD_GPIO_IO22__GPIO2_IO22          0x31e
+                       MX93_PAD_GPIO_IO23__GPIO2_IO23          0x31e
+               >;
+       };
+
        pinctrl_usdhc2_gpio: usdhc2gpiogrp {
                fsl,pins = <
                        MX93_PAD_SD2_CD_B__GPIO3_IO00           0x31e