drm/i915/display: Increase AUX timeout for Type-C
authorSuraj Kandpal <suraj.kandpal@intel.com>
Tue, 18 Apr 2023 13:14:25 +0000 (18:44 +0530)
committerAnimesh Manna <animesh.manna@intel.com>
Thu, 27 Apr 2023 06:09:09 +0000 (11:39 +0530)
Type-C PHYs are taking longer than expected for Aux IO Power Enabling.
Workaround: Increase the timeout.

---v2
-change style on how we mention WA [Ankit]
-fix bat error by creating new func that is only called for aux power
well scenarios so we can avoid null pointer error as it is called
everywhere.

--v3
-Add non-default enable_timeout to power well descriptor which avoids
adding more platform checks [Imre]

--v4
-Remove Bspec link from top to bottom remove WA link from commit put it
on comment [Jani]
-enable_timeout in ms and add .fixed_enable_delay too [Imre]

--v5
-move power_wells instead of duplicating them [Imre]

Bspec: 55480

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230418131425.1285088-1-suraj.kandpal@intel.com
drivers/gpu/drm/i915/display/intel_display_power_map.c
drivers/gpu/drm/i915/display/intel_display_power_well.c
drivers/gpu/drm/i915/display/intel_display_power_well.h

index ca448359a8226d0870064e4ce6f3219f182d4a49..1118ee9d224cabe25be352d0ce55410dd2b0086f 100644 (file)
@@ -1387,6 +1387,11 @@ static const struct i915_power_well_desc xelpd_power_wells_main[] = {
                        I915_PW("AUX_C", &icl_pwdoms_aux_c, .hsw.idx = ICL_PW_CTL_IDX_AUX_C),
                        I915_PW("AUX_D", &icl_pwdoms_aux_d, .hsw.idx = XELPD_PW_CTL_IDX_AUX_D),
                        I915_PW("AUX_E", &icl_pwdoms_aux_e, .hsw.idx = XELPD_PW_CTL_IDX_AUX_E),
+               ),
+               .ops = &icl_aux_power_well_ops,
+               .fixed_enable_delay = true,
+       }, {
+               .instances = &I915_PW_INSTANCES(
                        I915_PW("AUX_USBC1", &tgl_pwdoms_aux_usbc1, .hsw.idx = TGL_PW_CTL_IDX_AUX_TC1),
                        I915_PW("AUX_USBC2", &tgl_pwdoms_aux_usbc2, .hsw.idx = TGL_PW_CTL_IDX_AUX_TC2),
                        I915_PW("AUX_USBC3", &tgl_pwdoms_aux_usbc3, .hsw.idx = TGL_PW_CTL_IDX_AUX_TC3),
@@ -1394,6 +1399,8 @@ static const struct i915_power_well_desc xelpd_power_wells_main[] = {
                ),
                .ops = &icl_aux_power_well_ops,
                .fixed_enable_delay = true,
+               /* WA_14017248603: adlp */
+               .enable_timeout = 500,
        }, {
                .instances = &I915_PW_INSTANCES(
                        I915_PW("AUX_TBT1", &icl_pwdoms_aux_tbt1, .hsw.idx = TGL_PW_CTL_IDX_AUX_TBT1),
index 1a19fd3bf103ee74962d9b0be19a14f0c7bd456d..41eabdf3e871013c53c3c5db444efc6d402ed9bf 100644 (file)
@@ -254,6 +254,7 @@ static void hsw_wait_for_power_well_enable(struct drm_i915_private *dev_priv,
 {
        const struct i915_power_well_regs *regs = power_well->desc->ops->regs;
        int pw_idx = i915_power_well_instance(power_well)->hsw.idx;
+       int timeout = power_well->desc->enable_timeout ? : 1;
 
        /*
         * For some power wells we're not supposed to watch the status bit for
@@ -267,7 +268,7 @@ static void hsw_wait_for_power_well_enable(struct drm_i915_private *dev_priv,
 
        /* Timeout for PW1:10 us, AUX:not specified, other PWs:20 us. */
        if (intel_de_wait_for_set(dev_priv, regs->driver,
-                                 HSW_PWR_WELL_CTL_STATE(pw_idx), 1)) {
+                                 HSW_PWR_WELL_CTL_STATE(pw_idx), timeout)) {
                drm_dbg_kms(&dev_priv->drm, "%s power well enable timeout\n",
                            intel_power_well_name(power_well));
 
index ba7cb977e7c7f7e51fdad42bb99a46b07ca009a8..e494df379e6c23fd52a29dd07a8994b357b74103 100644 (file)
@@ -110,6 +110,8 @@ struct i915_power_well_desc {
         * Thunderbolt mode.
         */
        u16 is_tc_tbt:1;
+       /* Enable timeout if greater than the default 1ms */
+       u16 enable_timeout;
 };
 
 struct i915_power_well {