drm/i915/display: Move display device info to header under display/

Moving display-specific substructure definitions will help keep display
more self-contained and make it easier to re-use in other drivers (i.e.,
Xe) in the future.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230523195609.73627-2-matthew.d.roper@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
new file mode 100644 (file)
index 0000000..c689d58
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -0,0 +1,60 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#ifndef __INTEL_DISPLAY_DEVICE_H__
+#define __INTEL_DISPLAY_DEVICE_H__
+
+#include <linux/types.h>
+
+#include "display/intel_display_limits.h"
+
+#define DEV_INFO_DISPLAY_FOR_EACH_FLAG(func) \
+       /* Keep in alphabetical order */ \
+       func(cursor_needs_physical); \
+       func(has_cdclk_crawl); \
+       func(has_cdclk_squash); \
+       func(has_ddi); \
+       func(has_dp_mst); \
+       func(has_dsb); \
+       func(has_fpga_dbg); \
+       func(has_gmch); \
+       func(has_hotplug); \
+       func(has_hti); \
+       func(has_ipc); \
+       func(has_overlay); \
+       func(has_psr); \
+       func(has_psr_hw_tracking); \
+       func(overlay_needs_physical); \
+       func(supports_tv);
+
+struct intel_display_device_info {
+       u8 abox_mask;
+
+       struct {
+               u16 size; /* in blocks */
+               u8 slice_mask;
+       } dbuf;
+
+#define DEFINE_FLAG(name) u8 name:1
+       DEV_INFO_DISPLAY_FOR_EACH_FLAG(DEFINE_FLAG);
+#undef DEFINE_FLAG
+
+       /* Global register offset for the display engine */
+       u32 mmio_offset;
+
+       /* Register offsets for the various display pipes and transcoders */
+       u32 pipe_offsets[I915_MAX_TRANSCODERS];
+       u32 trans_offsets[I915_MAX_TRANSCODERS];
+       u32 cursor_offsets[I915_MAX_PIPES];
+
+       struct {
+               u32 degamma_lut_size;
+               u32 gamma_lut_size;
+               u32 degamma_lut_tests;
+               u32 gamma_lut_tests;
+       } color;
+};
+
+#endif

diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index f032f2500f5052f153098498b3e3652068ea05de..c14bc3f5d0fa187b158f9eefd10f760a3436fa73 100644 (file)
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -29,7 +29,7 @@
 
 #include "intel_step.h"
 
-#include "display/intel_display_limits.h"
+#include "display/intel_display_device.h"
 
 #include "gt/intel_engine_types.h"
 #include "gt/intel_context_types.h"
@@ -180,25 +180,6 @@ enum intel_ppgtt_type {
        func(unfenced_needs_alignment); \
        func(hws_needs_physical);
 
-#define DEV_INFO_DISPLAY_FOR_EACH_FLAG(func) \
-       /* Keep in alphabetical order */ \
-       func(cursor_needs_physical); \
-       func(has_cdclk_crawl); \
-       func(has_cdclk_squash); \
-       func(has_ddi); \
-       func(has_dp_mst); \
-       func(has_dsb); \
-       func(has_fpga_dbg); \
-       func(has_gmch); \
-       func(has_hotplug); \
-       func(has_hti); \
-       func(has_ipc); \
-       func(has_overlay); \
-       func(has_psr); \
-       func(has_psr_hw_tracking); \
-       func(overlay_needs_physical); \
-       func(supports_tv);
-
 struct intel_ip_version {
        u8 ver;
        u8 rel;
@@ -276,33 +257,7 @@ struct intel_device_info {
        DEV_INFO_FOR_EACH_FLAG(DEFINE_FLAG);
 #undef DEFINE_FLAG
 
-       struct {
-               u8 abox_mask;
-
-               struct {
-                       u16 size; /* in blocks */
-                       u8 slice_mask;
-               } dbuf;
-
-#define DEFINE_FLAG(name) u8 name:1
-               DEV_INFO_DISPLAY_FOR_EACH_FLAG(DEFINE_FLAG);
-#undef DEFINE_FLAG
-
-               /* Global register offset for the display engine */
-               u32 mmio_offset;
-
-               /* Register offsets for the various display pipes and transcoders */
-               u32 pipe_offsets[I915_MAX_TRANSCODERS];
-               u32 trans_offsets[I915_MAX_TRANSCODERS];
-               u32 cursor_offsets[I915_MAX_PIPES];
-
-               struct {
-                       u32 degamma_lut_size;
-                       u32 gamma_lut_size;
-                       u32 degamma_lut_tests;
-                       u32 gamma_lut_tests;
-               } color;
-       } display;
+       struct intel_display_device_info display;
 
        /*
         * Initial runtime info. Do not access outside of i915_driver_create().