ARM: dts: Add GSCL block parent clock management to pm domain on exynos542x
authorMarek Szyprowski <m.szyprowski@samsung.com>
Wed, 9 Dec 2015 08:07:35 +0000 (09:07 +0100)
committerKrzysztof Kozlowski <k.kozlowski@samsung.com>
Thu, 28 Jan 2016 12:46:53 +0000 (21:46 +0900)
Add support for restoring GScaler parent clocks configuration when GSCL
power domain is turned on.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
arch/arm/boot/dts/exynos5420.dtsi

index 2a405544ea4643563eb0a60c022cff8c3b298e7f..bb559d0cd956223a7a12bd3152d9ee31a0e46512 100644 (file)
                compatible = "samsung,exynos4210-pd";
                reg = <0x10044000 0x20>;
                #power-domain-cells = <0>;
-               clocks = <&clock CLK_GSCL0>, <&clock CLK_GSCL1>;
-               clock-names = "asb0", "asb1";
+               clocks = <&clock CLK_FIN_PLL>,
+                        <&clock CLK_MOUT_USER_ACLK300_GSCL>,
+                        <&clock CLK_GSCL0>, <&clock CLK_GSCL1>;
+               clock-names = "oscclk", "clk0", "asb0", "asb1";
        };
 
        isp_pd: power-domain@10044020 {