KVM: arm64: Refine _EL2 system register list that require trap reinjection

Implement a fine grained approach in the _EL2 sysreg range instead of
the current wide cast trap. This ensures that we don't mistakenly
inject the wrong exception into the guest.

[maz: commit message massaging, dropped secure and AArch32 registers
      from the list]

Fixes: d0fc0a2519a6 ("KVM: arm64: nv: Add trap forwarding for HCR_EL2")
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Miguel Luis <miguel.luis@oracle.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20231023095444.1587322-4-maz@kernel.org
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>

diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c
index 9ced1bf0c2b7824aef1a7285826a4c8978b35170..91cc851a6c756fb0aa4ed35a68719f97436382a0 100644 (file)
--- a/arch/arm64/kvm/emulate-nested.c
+++ b/arch/arm64/kvm/emulate-nested.c
@@ -648,15 +648,80 @@ static const struct encoding_to_trap_config encoding_to_cgt[] __initconst = {
        SR_TRAP(SYS_APGAKEYLO_EL1,      CGT_HCR_APK),
        SR_TRAP(SYS_APGAKEYHI_EL1,      CGT_HCR_APK),
        /* All _EL2 registers */
-       SR_RANGE_TRAP(sys_reg(3, 4, 0, 0, 0),
-                     sys_reg(3, 4, 3, 15, 7), CGT_HCR_NV),
+       SR_TRAP(SYS_BRBCR_EL2,          CGT_HCR_NV),
+       SR_TRAP(SYS_VPIDR_EL2,          CGT_HCR_NV),
+       SR_TRAP(SYS_VMPIDR_EL2,         CGT_HCR_NV),
+       SR_TRAP(SYS_SCTLR_EL2,          CGT_HCR_NV),
+       SR_TRAP(SYS_ACTLR_EL2,          CGT_HCR_NV),
+       SR_TRAP(SYS_SCTLR2_EL2,         CGT_HCR_NV),
+       SR_RANGE_TRAP(SYS_HCR_EL2,
+                     SYS_HCRX_EL2,     CGT_HCR_NV),
+       SR_TRAP(SYS_SMPRIMAP_EL2,       CGT_HCR_NV),
+       SR_TRAP(SYS_SMCR_EL2,           CGT_HCR_NV),
+       SR_RANGE_TRAP(SYS_TTBR0_EL2,
+                     SYS_TCR2_EL2,     CGT_HCR_NV),
+       SR_TRAP(SYS_VTTBR_EL2,          CGT_HCR_NV),
+       SR_TRAP(SYS_VTCR_EL2,           CGT_HCR_NV),
+       SR_TRAP(SYS_VNCR_EL2,           CGT_HCR_NV),
+       SR_RANGE_TRAP(SYS_HDFGRTR_EL2,
+                     SYS_HAFGRTR_EL2,  CGT_HCR_NV),
        /* Skip the SP_EL1 encoding... */
        SR_TRAP(SYS_SPSR_EL2,           CGT_HCR_NV),
        SR_TRAP(SYS_ELR_EL2,            CGT_HCR_NV),
-       SR_RANGE_TRAP(sys_reg(3, 4, 4, 1, 1),
-                     sys_reg(3, 4, 10, 15, 7), CGT_HCR_NV),
-       SR_RANGE_TRAP(sys_reg(3, 4, 12, 0, 0),
-                     sys_reg(3, 4, 14, 15, 7), CGT_HCR_NV),
+       /* Skip SPSR_irq, SPSR_abt, SPSR_und, SPSR_fiq */
+       SR_TRAP(SYS_AFSR0_EL2,          CGT_HCR_NV),
+       SR_TRAP(SYS_AFSR1_EL2,          CGT_HCR_NV),
+       SR_TRAP(SYS_ESR_EL2,            CGT_HCR_NV),
+       SR_TRAP(SYS_VSESR_EL2,          CGT_HCR_NV),
+       SR_TRAP(SYS_TFSR_EL2,           CGT_HCR_NV),
+       SR_TRAP(SYS_FAR_EL2,            CGT_HCR_NV),
+       SR_TRAP(SYS_HPFAR_EL2,          CGT_HCR_NV),
+       SR_TRAP(SYS_PMSCR_EL2,          CGT_HCR_NV),
+       SR_TRAP(SYS_MAIR_EL2,           CGT_HCR_NV),
+       SR_TRAP(SYS_AMAIR_EL2,          CGT_HCR_NV),
+       SR_TRAP(SYS_MPAMHCR_EL2,        CGT_HCR_NV),
+       SR_TRAP(SYS_MPAMVPMV_EL2,       CGT_HCR_NV),
+       SR_TRAP(SYS_MPAM2_EL2,          CGT_HCR_NV),
+       SR_RANGE_TRAP(SYS_MPAMVPM0_EL2,
+                     SYS_MPAMVPM7_EL2, CGT_HCR_NV),
+       /*
+        * Note that the spec. describes a group of MEC registers
+        * whose access should not trap, therefore skip the following:
+        * MECID_A0_EL2, MECID_A1_EL2, MECID_P0_EL2,
+        * MECID_P1_EL2, MECIDR_EL2, VMECID_A_EL2,
+        * VMECID_P_EL2.
+        */
+       SR_RANGE_TRAP(SYS_VBAR_EL2,
+                     SYS_RMR_EL2,      CGT_HCR_NV),
+       SR_TRAP(SYS_VDISR_EL2,          CGT_HCR_NV),
+       /* ICH_AP0R<m>_EL2 */
+       SR_RANGE_TRAP(SYS_ICH_AP0R0_EL2,
+                     SYS_ICH_AP0R3_EL2, CGT_HCR_NV),
+       /* ICH_AP1R<m>_EL2 */
+       SR_RANGE_TRAP(SYS_ICH_AP1R0_EL2,
+                     SYS_ICH_AP1R3_EL2, CGT_HCR_NV),
+       SR_TRAP(SYS_ICC_SRE_EL2,        CGT_HCR_NV),
+       SR_RANGE_TRAP(SYS_ICH_HCR_EL2,
+                     SYS_ICH_EISR_EL2, CGT_HCR_NV),
+       SR_TRAP(SYS_ICH_ELRSR_EL2,      CGT_HCR_NV),
+       SR_TRAP(SYS_ICH_VMCR_EL2,       CGT_HCR_NV),
+       /* ICH_LR<m>_EL2 */
+       SR_RANGE_TRAP(SYS_ICH_LR0_EL2,
+                     SYS_ICH_LR15_EL2, CGT_HCR_NV),
+       SR_TRAP(SYS_CONTEXTIDR_EL2,     CGT_HCR_NV),
+       SR_TRAP(SYS_TPIDR_EL2,          CGT_HCR_NV),
+       SR_TRAP(SYS_SCXTNUM_EL2,        CGT_HCR_NV),
+       /* AMEVCNTVOFF0<n>_EL2, AMEVCNTVOFF1<n>_EL2  */
+       SR_RANGE_TRAP(SYS_AMEVCNTVOFF0n_EL2(0),
+                     SYS_AMEVCNTVOFF1n_EL2(15), CGT_HCR_NV),
+       /* CNT*_EL2 */
+       SR_TRAP(SYS_CNTVOFF_EL2,        CGT_HCR_NV),
+       SR_TRAP(SYS_CNTPOFF_EL2,        CGT_HCR_NV),
+       SR_TRAP(SYS_CNTHCTL_EL2,        CGT_HCR_NV),
+       SR_RANGE_TRAP(SYS_CNTHP_TVAL_EL2,
+                     SYS_CNTHP_CVAL_EL2, CGT_HCR_NV),
+       SR_RANGE_TRAP(SYS_CNTHV_TVAL_EL2,
+                     SYS_CNTHV_CVAL_EL2, CGT_HCR_NV),
        /* All _EL02, _EL12 registers */
        SR_RANGE_TRAP(sys_reg(3, 5, 0, 0, 0),
                      sys_reg(3, 5, 10, 15, 7), CGT_HCR_NV),