arm64: dts: qcom: sa8155: Enable PCIe nodes
authorBhupesh Sharma <bhupesh.sharma@linaro.org>
Sat, 26 Mar 2022 05:57:54 +0000 (11:27 +0530)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Sat, 9 Apr 2022 00:31:18 +0000 (19:31 -0500)
SA8155p ADP board supports the PCIe0 controller in the RC
mode (only). So add the support for the same.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220326055754.1796146-3-bhupesh.sharma@linaro.org
arch/arm64/boot/dts/qcom/sa8155p-adp.dts

index 8756c2b25c7ea51d9a16183363399c9b0e046465..676e4fe3f848d281784f4258c430a57d0db1e9e7 100644 (file)
        vdda-pll-supply = <&vdda_usb_ss_dp_core_1>;
 };
 
+&pcie0 {
+       status = "okay";
+};
+
+&pcie0_phy {
+       status = "okay";
+       vdda-phy-supply = <&vreg_l18c_0p88>;
+       vdda-pll-supply = <&vreg_l8c_1p2>;
+};
+
+&pcie1_phy {
+       vdda-phy-supply = <&vreg_l18c_0p88>;
+       vdda-pll-supply = <&vreg_l8c_1p2>;
+};
+
 &tlmm {
        gpio-reserved-ranges = <0 4>;