x86/microcode/AMD: Add get_patch_level()

Put the MSR_AMD64_PATCH_LEVEL reading of the current microcode revision
the hw has, into a separate function.

Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20250211163648.30531-6-bp@kernel.org

diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/microcode/amd.c
index adfea4d0d129759b1b395c5084fe71b34c76a769..31f90e129b0838caa1f423fa85d72adae6f73403 100644 (file)
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -145,6 +145,15 @@ ucode_path[] __maybe_unused = "kernel/x86/microcode/AuthenticAMD.bin";
  */
 static u32 bsp_cpuid_1_eax __ro_after_init;
 
+static u32 get_patch_level(void)
+{
+       u32 rev, dummy __always_unused;
+
+       native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
+
+       return rev;
+}
+
 static union cpuid_1_eax ucode_rev_to_cpuid(unsigned int val)
 {
        union zen_patch_rev p;
@@ -483,10 +492,10 @@ static void scan_containers(u8 *ucode, size_t size, struct cont_desc *desc)
        }
 }
 
-static bool __apply_microcode_amd(struct microcode_amd *mc, unsigned int psize)
+static bool __apply_microcode_amd(struct microcode_amd *mc, u32 *cur_rev,
+                                 unsigned int psize)
 {
        unsigned long p_addr = (unsigned long)&mc->hdr.data_code;
-       u32 rev, dummy;
 
        native_wrmsrl(MSR_AMD64_PATCH_LOADER, p_addr);
 
@@ -504,9 +513,8 @@ static bool __apply_microcode_amd(struct microcode_amd *mc, unsigned int psize)
        }
 
        /* verify patch application was successful */
-       native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
-
-       if (rev != mc->hdr.patch_id)
+       *cur_rev = get_patch_level();
+       if (*cur_rev != mc->hdr.patch_id)
                return false;
 
        return true;
@@ -563,11 +571,12 @@ void __init load_ucode_amd_bsp(struct early_load_data *ed, unsigned int cpuid_1_
        struct cont_desc desc = { };
        struct microcode_amd *mc;
        struct cpio_data cp = { };
-       u32 dummy;
+       u32 rev;
 
        bsp_cpuid_1_eax = cpuid_1_eax;
 
-       native_rdmsr(MSR_AMD64_PATCH_LEVEL, ed->old_rev, dummy);
+       rev = get_patch_level();
+       ed->old_rev = rev;
 
        /* Needed in load_microcode_amd() */
        ucode_cpu_info[0].cpu_sig.sig = cpuid_1_eax;
@@ -589,8 +598,8 @@ void __init load_ucode_amd_bsp(struct early_load_data *ed, unsigned int cpuid_1_
        if (ed->old_rev > mc->hdr.patch_id)
                return;
 
-       if (__apply_microcode_amd(mc, desc.psize))
-               native_rdmsr(MSR_AMD64_PATCH_LEVEL, ed->new_rev, dummy);
+       if (__apply_microcode_amd(mc, &rev, desc.psize))
+               ed->new_rev = rev;
 }
 
 static inline bool patch_cpus_equivalent(struct ucode_patch *p,
@@ -692,14 +701,9 @@ static void free_cache(void)
 static struct ucode_patch *find_patch(unsigned int cpu)
 {
        struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
-       u32 rev, dummy __always_unused;
        u16 equiv_id = 0;
 
-       /* fetch rev if not populated yet: */
-       if (!uci->cpu_sig.rev) {
-               rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
-               uci->cpu_sig.rev = rev;
-       }
+       uci->cpu_sig.rev = get_patch_level();
 
        if (x86_family(bsp_cpuid_1_eax) < 0x17) {
                equiv_id = find_equiv_id(&equiv_table, uci->cpu_sig.sig);
@@ -722,22 +726,20 @@ void reload_ucode_amd(unsigned int cpu)
 
        mc = p->data;
 
-       rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
-
+       rev = get_patch_level();
        if (rev < mc->hdr.patch_id) {
-               if (__apply_microcode_amd(mc, p->size))
-                       pr_info_once("reload revision: 0x%08x\n", mc->hdr.patch_id);
+               if (__apply_microcode_amd(mc, &rev, p->size))
+                       pr_info_once("reload revision: 0x%08x\n", rev);
        }
 }
 
 static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
 {
-       struct cpuinfo_x86 *c = &cpu_data(cpu);
        struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
        struct ucode_patch *p;
 
        csig->sig = cpuid_eax(0x00000001);
-       csig->rev = c->microcode;
+       csig->rev = get_patch_level();
 
        /*
         * a patch could have been loaded early, set uci->mc so that
@@ -778,7 +780,7 @@ static enum ucode_state apply_microcode_amd(int cpu)
                goto out;
        }
 
-       if (!__apply_microcode_amd(mc_amd, p->size)) {
+       if (!__apply_microcode_amd(mc_amd, &rev, p->size)) {
                pr_err("CPU%d: update failed for patch_level=0x%08x\n",
                        cpu, mc_amd->hdr.patch_id);
                return UCODE_ERROR;