drm/i915/adl-n: Add PCH Support for Alder Lake N
authorTejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Thu, 27 Jan 2022 10:35:20 +0000 (16:05 +0530)
committerMatt Roper <matthew.d.roper@intel.com>
Wed, 23 Feb 2022 05:36:34 +0000 (21:36 -0800)
Add the PCH ID for ADL-N.

Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220127103520.348015-1-tejaskumarx.surendrakumar.upadhyay@intel.com
drivers/gpu/drm/i915/intel_pch.c
drivers/gpu/drm/i915/intel_pch.h

index da8f82c2342f4c23a092aa172b716acfd9d0a7f1..4f7a61d5502e40511dec0881bff25f92b08e35d0 100644 (file)
@@ -130,6 +130,7 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id)
        case INTEL_PCH_ADP_DEVICE_ID_TYPE:
        case INTEL_PCH_ADP2_DEVICE_ID_TYPE:
        case INTEL_PCH_ADP3_DEVICE_ID_TYPE:
+       case INTEL_PCH_ADP4_DEVICE_ID_TYPE:
                drm_dbg_kms(&dev_priv->drm, "Found Alder Lake PCH\n");
                drm_WARN_ON(&dev_priv->drm, !IS_ALDERLAKE_S(dev_priv) &&
                            !IS_ALDERLAKE_P(dev_priv));
index 6bff775210943a2971b3c212eae60b3aa22347a8..6fd20408f7bfe49036aef73ac81378f04ec321a4 100644 (file)
@@ -58,6 +58,7 @@ enum intel_pch {
 #define INTEL_PCH_ADP_DEVICE_ID_TYPE           0x7A80
 #define INTEL_PCH_ADP2_DEVICE_ID_TYPE          0x5180
 #define INTEL_PCH_ADP3_DEVICE_ID_TYPE          0x7A00
+#define INTEL_PCH_ADP4_DEVICE_ID_TYPE          0x5480
 #define INTEL_PCH_P2X_DEVICE_ID_TYPE           0x7100
 #define INTEL_PCH_P3X_DEVICE_ID_TYPE           0x7000
 #define INTEL_PCH_QEMU_DEVICE_ID_TYPE          0x2900 /* qemu q35 has 2918 */