KVM: PPC: Book3S HV P9: Inject pending xive interrupts at guest entry

If there is a pending xive interrupt, inject it at guest entry (if
MSR[EE] is enabled) rather than take another interrupt when the guest
is entered. If xive is enabled then LPCR[LPES] is set so this behaviour
should be expected.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220303053315.1056880-3-npiggin@gmail.com

diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index e1e0d1582885a5c9e073807467390e067f99d099..2bf1c23b017181c140950ea19fcb57041bda672f 100644 (file)
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -4519,9 +4519,14 @@ int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu, u64 time_limit,
 
        if (!nested) {
                kvmppc_core_prepare_to_enter(vcpu);
-               if (test_bit(BOOK3S_IRQPRIO_EXTERNAL,
-                            &vcpu->arch.pending_exceptions))
+               if (vcpu->arch.shregs.msr & MSR_EE) {
+                       if (xive_interrupt_pending(vcpu))
+                               kvmppc_inject_interrupt_hv(vcpu,
+                                               BOOK3S_INTERRUPT_EXTERNAL, 0);
+               } else if (test_bit(BOOK3S_IRQPRIO_EXTERNAL,
+                            &vcpu->arch.pending_exceptions)) {
                        lpcr |= LPCR_MER;
+               }
        } else if (vcpu->arch.pending_exceptions ||
                   vcpu->arch.doorbell_request ||
                   xive_interrupt_pending(vcpu)) {