drm/amd/display: Make DML2.1 P-State method force per stream
authorDillon Varone <dillon.varone@amd.com>
Thu, 13 Jun 2024 16:08:16 +0000 (12:08 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 27 Jun 2024 21:10:37 +0000 (17:10 -0400)
[WHY & HOW]
Currently the force only works for a single display, make it so it can
be forced per stream.

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dc.h
drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c
drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c
drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h

index d0d1af451b6475693739cac39a209c33f0ba7210..e0334b573f2dfaeef06be565a1f7b5b546fe1994 100644 (file)
@@ -1038,7 +1038,7 @@ struct dc_debug_options {
        bool force_chroma_subsampling_1tap;
        bool disable_422_left_edge_pixel;
        bool dml21_force_pstate_method;
-       uint32_t dml21_force_pstate_method_value;
+       uint32_t dml21_force_pstate_method_values[MAX_PIPES];
        uint32_t dml21_disable_pstate_method_mask;
        union dmub_fams2_global_feature_config fams2_config;
        bool enable_legacy_clock_update;
index d5ead0205053b24d21de4dde1b06b6c4bfb70064..06387b8b0aee5e0a45f594bf2479b0bbfa1f7859 100644 (file)
@@ -1000,7 +1000,7 @@ bool dml21_map_dc_state_into_dml_display_cfg(const struct dc *in_dc, struct dc_s
                                /* apply forced pstate policy */
                                if (dml_ctx->config.pmo.force_pstate_method_enable) {
                                        dml_dispcfg->plane_descriptors[disp_cfg_plane_location].overrides.uclk_pstate_change_strategy =
-                                                       dml21_force_pstate_method_to_uclk_state_change_strategy(dml_ctx->config.pmo.force_pstate_method_value);
+                                                       dml21_force_pstate_method_to_uclk_state_change_strategy(dml_ctx->config.pmo.force_pstate_method_values[stream_index]);
                                }
                        }
                }
index 9c28304568d2c7378bc66a6ef356518089238a79..c310354cd5fc0cf96ad17dd9228c2e01f1f4e6ed 100644 (file)
@@ -47,7 +47,8 @@ static void dml21_apply_debug_options(const struct dc *in_dc, struct dml2_contex
        /* UCLK P-State options */
        if (in_dc->debug.dml21_force_pstate_method) {
                dml_ctx->config.pmo.force_pstate_method_enable = true;
-               dml_ctx->config.pmo.force_pstate_method_value = in_dc->debug.dml21_force_pstate_method_value;
+               for (int i = 0; i < MAX_PIPES; i++)
+                       dml_ctx->config.pmo.force_pstate_method_values[i] = in_dc->debug.dml21_force_pstate_method_values[i];
        } else {
                dml_ctx->config.pmo.force_pstate_method_enable = false;
        }
index 79bf2d75780400b2b15f4d10e452c9dae82c211f..1e891a3297c228480edcaffb198788a554d315e9 100644 (file)
@@ -230,7 +230,7 @@ struct dml2_configuration_options {
        struct socbb_ip_params_external *external_socbb_ip_params;
        struct {
                bool force_pstate_method_enable;
-               enum dml2_force_pstate_methods force_pstate_method_value;
+               enum dml2_force_pstate_methods force_pstate_method_values[MAX_PIPES];
        } pmo;
        bool map_dc_pipes_with_callbacks;