kbuild: remove dead code in cmd_files calculation in top Makefile

Nobody sets 'targets' in the top-level Makefile or arch/*/Makefile,
hence $(targets) is empty.

$(wildcard .*.cmd) will do for including the .vmlinux.cmd file.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/Makefile b/Makefile
index 4b76e225fdae93b3244471cbe8f8988dd1494212..8f6dbfce1e7edaac108feaf3df2bf45c34ef177a 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -1721,8 +1721,7 @@ cmd_crmodverdir = $(Q)mkdir -p $(MODVERDIR) \
                   $(if $(KBUILD_MODULES),; rm -f $(MODVERDIR)/*)
 
 # read all saved command lines
-
-cmd_files := $(wildcard .*.cmd $(foreach f,$(sort $(targets)),$(dir $(f)).$(notdir $(f)).cmd))
+cmd_files := $(wildcard .*.cmd)
 
 ifneq ($(cmd_files),)
   $(cmd_files): ;      # Do not try to update included dependency files