riscv: misaligned: factorize trap handling
authorClément Léger <cleger@rivosinc.com>
Tue, 22 Apr 2025 16:23:08 +0000 (18:23 +0200)
committerAlexandre Ghiti <alexghiti@rivosinc.com>
Thu, 8 May 2025 12:00:13 +0000 (12:00 +0000)
commitfd94de9f9e7aac11ec659e386b9db1203d502023
treec5725e759f9e258c694f2de1d6445f683acc43a6
parenteb16b3727c05ed36420c90eca1e8f0e279514c1c
riscv: misaligned: factorize trap handling

Since both load/store and user/kernel should use almost the same path and
that we are going to add some code around that, factorize it.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Link: https://lore.kernel.org/r/20250422162324.956065-2-cleger@rivosinc.com
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
arch/riscv/kernel/traps.c