drm/amd/display: Enable RCO for PHYSYMCLK in DCN35
authorDaniel Miess <daniel.miess@amd.com>
Wed, 24 Apr 2024 08:49:13 +0000 (16:49 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 30 Apr 2024 13:54:31 +0000 (09:54 -0400)
commitf2303026a5b6327247ba61152d00199b2d1be294
treeb8246d7c18fad87ced016585b989aa6ebdd7d814
parent47745acc5e8dd9b92dc877d3436801106c5e6864
drm/amd/display: Enable RCO for PHYSYMCLK in DCN35

[Why & How]
Enable root clock optimization for PHYSYMCLK and only
disable it when it's actively being used

v2:  Fix array-index-out-of-bounds in dcn35_calc_blocks_to_gate

Reviewed-by: Roman Li <roman.li@amd.com>
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Daniel Miess <daniel.miess@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dc.h
drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dccg.c
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c
drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c
drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h