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(parent: 366974e) | patch
drm/xe/mtl: Fix PAT table coherency settings
authorMatt Roper <matthew.d.roper@intel.com>
Fri, 24 Mar 2023 21:04:14 +0000 (14:04 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Tue, 19 Dec 2023 23:30:25 +0000 (18:30 -0500)
commitf16a3f6335e84c07de4b5dd263f0c26e3a3fa5a4
treeba2617ec554faf01b006ca5585d470691a777450tree
parent366974e4a69c09a441eca7802028e60b39903386commit | diff
drm/xe/mtl: Fix PAT table coherency settings

Re-sync our MTL PAT table with the bspec.  1-way coherency should only
be set on table entry 3.  We do not want an incorrect setting here to
accidentally paper over other bugs elsewhere in the driver.

Bspec: 45101
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
Link: https://lore.kernel.org/r/20230324210415.2434992-6-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/xe/xe_pat.c diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)