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net/mlx5: DPLL, Implement fractional frequency offset get pin op
authorJiri Pirko <jiri@nvidia.com>
Wed, 3 Jan 2024 13:28:38 +0000 (14:28 +0100)
committerJakub Kicinski <kuba@kernel.org>
Fri, 5 Jan 2024 15:58:19 +0000 (07:58 -0800)
commitf035dca34ede00d667a3e2d16e1c731161eeacec
treeabb6c5cff16e3a0013bd697ca5dd148fd2fd86a5tree | snapshot
parente6d86938a40a60adaffad170914380b886c029f8commit | diff
net/mlx5: DPLL, Implement fractional frequency offset get pin op

Implement ffo_get() pin op filling it up to MSEED.frequency_diff value.

Signed-off-by: Jiri Pirko <jiri@nvidia.com>
Reviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Acked-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
Acked-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Link: https://lore.kernel.org/r/20240103132838.1501801-4-jiri@resnulli.us
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/ethernet/mellanox/mlx5/core/dpll.c diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)