bus: ti-sysc: Enable interconnect target module autoidle bit on enable
authorTony Lindgren <tony@atomide.com>
Mon, 27 May 2019 11:51:54 +0000 (04:51 -0700)
committerTony Lindgren <tony@atomide.com>
Tue, 28 May 2019 12:19:15 +0000 (05:19 -0700)
commiteec26555ae9bf69da8bfe90cacdbc85d7a23391b
tree5bd8636931cff896b1ddd44f22c214fa52b868c3
parentbd808f9a442301e493fe0bb3168774b4da7bb605
bus: ti-sysc: Enable interconnect target module autoidle bit on enable

For interconnect target modules with autoidle bit wired, we need to manage
it for enable and disable.

Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
drivers/bus/ti-sysc.c