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(parent: be0478e) | patch
drm/amdgpu: use pd addr based on gart level page table
authorAlex Sierra <alex.sierra@amd.com>
Thu, 4 Feb 2021 01:02:20 +0000 (19:02 -0600)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 24 Mar 2021 02:59:07 +0000 (22:59 -0400)
commitec8631e01143e593c4f28d3d2d8a11073ce38b7f
treec1a58e14f4857249bae07f3d40b8a547d75960dftree
parentbe0478e7b02a3f045be3f466d14a311145ba141fcommit | diff
drm/amdgpu: use pd addr based on gart level page table

With a recent gart page table re-construction, the gart page
table is now 2-level for some ASICs: PDB0->PTB.
In the case of 2-level gart page table, the page_table_base
of vmid0 should point to PDB0 instead of PTB.

Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Oak Zeng <Oak.Zeng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)