drm/i915/tgl: Implement Wa_1409804808
authorJosé Roberto de Souza <jose.souza@intel.com>
Thu, 27 Feb 2020 22:00:51 +0000 (14:00 -0800)
committerJosé Roberto de Souza <jose.souza@intel.com>
Mon, 2 Mar 2020 20:00:39 +0000 (12:00 -0800)
commitec1e12645ff3987f660ef9dc21c9db548b43ee9b
treeb7adb6d88d2693d1e9702333610e1686d5333176
parentccc495fd7ac3815702378712bccc1cbfc7852b58
drm/i915/tgl: Implement Wa_1409804808

This workaround the CS not done issue on PIPE_CONTROL.

v2:
- replaced BIT() by REG_BIT() in all GEN7_ROW_CHICKEN2() bits
- shortened the name of the new bit

BSpec: 52890
BSpec: 46218
Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200227220101.321671-1-jose.souza@intel.com
drivers/gpu/drm/i915/gt/intel_workarounds.c
drivers/gpu/drm/i915/i915_reg.h