drm/i915/display: Add macro for checking 3 DSC engines
authorAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Mon, 14 Apr 2025 08:57:01 +0000 (14:27 +0530)
committerJani Nikula <jani.nikula@intel.com>
Tue, 15 Apr 2025 07:33:30 +0000 (10:33 +0300)
commitec0c7afa70d5ccec44e736b60ed2e7c191d054cb
tree32e80d82d2ca39fe0013ba7f4e0c02a0a1c802dc
parent8ffd015db85fea3e15a77027fda6c02ced4d2444
drm/i915/display: Add macro for checking 3 DSC engines

3 DSC engines per pipe is currently supported only for BMG.
Add a macro to check whether a platform supports 3 DSC engines per pipe.

v2:Fix Typo in macro argument. (Suraj).
Added fixes tag.

Bspec: 50175
Fixes: be7f5fcdf4a0 ("drm/i915/dp: Enable 3 DSC engines for 12 slices")
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Cc: <stable@vger.kernel.org> # v6.14+
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/20250414085701.2802374-1-ankit.k.nautiyal@intel.com
(cherry picked from commit 6998cfce0e1db58c730d08cadc6bfd71e26e2de0)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/display/intel_display_device.h