clk: qcom: camcc-sm8450: Move PLL & clk configuration to really probe
authorJagadeesh Kona <quic_jkona@quicinc.com>
Fri, 30 May 2025 13:20:54 +0000 (18:50 +0530)
committerBjorn Andersson <andersson@kernel.org>
Tue, 10 Jun 2025 17:59:20 +0000 (12:59 -0500)
commiteb65d754eb5eaeab7db87ce7e64dab27b7d156d8
tree199b492d03ea389f4b8f0c7e8c1e4ba3ffd36df2
parenta9dc2cc7279a1967f37192a2f954e7111bfa61b7
clk: qcom: camcc-sm8450: Move PLL & clk configuration to really probe

Camera PLLs on SM8450/SM8475 require both MMCX and MXC rails to be
kept ON to configure the PLLs properly. Hence move runtime power
management, PLL configuration and enable critical clocks to
qcom_cc_really_probe() which ensures all required power domains are in
enabled state before configuring the PLLs or enabling the clocks.

This change also removes the modelling for cam_cc_gdsc_clk and keeps it
always ON from probe since using CLK_IS_CRITICAL will prevent the clock
controller associated power domains from collapsing due to clock framework
invoking clk_pm_runtime_get() during prepare.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Link: https://lore.kernel.org/r/20250530-videocc-pll-multi-pd-voting-v5-9-02303b3a582d@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
drivers/clk/qcom/camcc-sm8450.c