drm/xe/xe2: Track VA bits independently of max page table level
authorMatt Roper <matthew.d.roper@intel.com>
Fri, 11 Aug 2023 16:06:13 +0000 (09:06 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Thu, 21 Dec 2023 16:40:25 +0000 (11:40 -0500)
commite9bb0891e69055cdfc1053f297b1b8b033372975
tree777c150d5c50aa671d7603c96918e109aa6bf0f8
parent595e4a3aade359f8e3bc84bd30746cb5826c4e67
drm/xe/xe2: Track VA bits independently of max page table level

Starting with Xe2, a 5-level page table is always used, regardless of
the actual virtual address range supported by the platform.  The two
values need to be tracked separately in the device descriptor since Xe2
platforms only have a 48 bit virtual address range.

Bspec: 59505, 65637, 70817
Cc: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/xe/xe_device_types.h
drivers/gpu/drm/xe/xe_pci.c
drivers/gpu/drm/xe/xe_pci_types.h
drivers/gpu/drm/xe/xe_query.c
drivers/gpu/drm/xe/xe_vm.c