powerpc/64s: Prepare to handle data interrupts vs d-side MCE reentrancy
authorNicholas Piggin <npiggin@gmail.com>
Tue, 26 Feb 2019 08:51:09 +0000 (18:51 +1000)
committerMichael Ellerman <mpe@ellerman.id.au>
Tue, 26 Feb 2019 12:28:26 +0000 (23:28 +1100)
commite779fc93643c1181b0164745a537986a525850ca
tree3f372163d59b52bf1bd2369596dd8074a6dc30dd
parentcbf2ba952a70399c972f2a2126a4ac6f79437f37
powerpc/64s: Prepare to handle data interrupts vs d-side MCE reentrancy

A subsequent fix for data interrupts (those that set DAR / DSISR)
requires some interrupt macros to be open-coded, and also requires
the 0x300 interrupt handler to be moved out-of-line.

This patch does that without changing behaviour, which makes the later
fix a smaller change.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/kernel/exceptions-64s.S