dt-bindings: riscv: Add xtheadvector ISA extension description
authorCharlie Jenkins <charlie@rivosinc.com>
Thu, 14 Nov 2024 02:21:07 +0000 (18:21 -0800)
committerPalmer Dabbelt <palmer@rivosinc.com>
Sat, 18 Jan 2025 20:33:26 +0000 (12:33 -0800)
commite576b7cb818343e2dc740185fbea6af580763dde
tree66a94489f62f44a9b8bb18ffd8fbf9f208bd061f
parent9d87cf525fd2e1a5fcbbb40ee3df216d1d266c88
dt-bindings: riscv: Add xtheadvector ISA extension description

The xtheadvector ISA extension is described on the T-Head extension spec
Github page [1] at commit 95358cb2cca9.

Link: https://github.com/T-head-Semi/thead-extension-spec/blob/95358cb2cca9489361c61d335e03d3134b14133f/xtheadvector.adoc
Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Tested-by: Yangyu Chen <cyy@cyyself.name>
Link: https://lore.kernel.org/r/20241113-xtheadvector-v11-1-236c22791ef9@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Documentation/devicetree/bindings/riscv/extensions.yaml