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(parent: 65994c0) | patch
spi: dt-bindings: sifive: Add missing 2nd register region
authorRob Herring <robh@kernel.org>
Tue, 12 May 2020 20:45:39 +0000 (15:45 -0500)
committerRob Herring <robh@kernel.org>
Thu, 14 May 2020 19:42:54 +0000 (14:42 -0500)
commite2f233ec155360d1cfff19cde77ffd4785d571da
tree6829cde39dedd45c5bf0dbf739cfcbe428bad935tree | snapshot
parent65994c09bc66d7241be2f7d6eb3b43f894ba2db0commit | diff
spi: dt-bindings: sifive: Add missing 2nd register region

The 'reg' description and example have a 2nd register region for memory
mapped flash, but the schema says there is only 1 region. Fix this.

Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: linux-spi@vger.kernel.org
Cc: linux-riscv@lists.infradead.org
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Documentation/devicetree/bindings/spi/spi-sifive.yaml diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)