ARM: dts: aspeed: catalina: Enable multi-master on additional I2C buses
authorPotin Lai <potin.lai.pt@gmail.com>
Fri, 21 Mar 2025 07:26:09 +0000 (15:26 +0800)
committerAndrew Jeffery <andrew@codeconstruct.com.au>
Wed, 11 Jun 2025 04:19:19 +0000 (13:49 +0930)
commitdf89538262c5af1ee86619a4200533c238ffbd73
tree4ac18db3524361ad7ad41cb6241585a4778020aa
parent8f58b439c4514aa9735a9becdff52f13c172194f
ARM: dts: aspeed: catalina: Enable multi-master on additional I2C buses

Update the device tree to enable `multi-master` mode on I2C buses shared
between the host BMC and the NV module with HMC. This ensures proper bus
arbitration and coordination in multi-master environments, preventing
communication conflicts and improving reliability.

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Link: https://patch.msgid.link/20250321-potin-catalina-dts-update-20250102-v6-8-4bd85efeb9b4@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-catalina.dts