drm/i915/dp_mst: Enable FEC early once it's known DSC is needed
authorImre Deak <imre.deak@intel.com>
Tue, 24 Oct 2023 01:09:05 +0000 (04:09 +0300)
committerImre Deak <imre.deak@intel.com>
Wed, 8 Nov 2023 15:22:10 +0000 (17:22 +0200)
commitd91680efcaaba6cc2e7cd83e4aa5e1d0f1c6f684
tree4cc5c64756df0e8e1e581efd17b73833744a102a
parentc1d6a22b7219bd52c66e9e038a282ba79f04be1f
drm/i915/dp_mst: Enable FEC early once it's known DSC is needed

Enable FEC in crtc_state, as soon as it's known it will be needed by
DSC. This fixes the calculation of BW allocation overhead, in case DSC
is enabled by falling back to it during the encoder compute config
phase (vs. enabling FEC due to DSC being enabled on other streams).

v2:
- Enable FEC only in intel_dp_mst_find_vcpi_slots_for_bpp(), since
  only by that will crtc_state->port_clock be set, which in turn is
  needed by intel_dp_is_uhbr().

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> (v1)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231030155843.2251023-11-imre.deak@intel.com
drivers/gpu/drm/i915/display/intel_dp.c
drivers/gpu/drm/i915/display/intel_dp.h
drivers/gpu/drm/i915/display/intel_dp_mst.c