media: qcom: camss: Fix invalid clock enable bit disjunction
authorBryan O'Donoghue <bryan.odonoghue@linaro.org>
Wed, 30 Aug 2023 15:16:13 +0000 (16:16 +0100)
committerHans Verkuil <hverkuil-cisco@xs4all.nl>
Wed, 27 Sep 2023 07:39:54 +0000 (09:39 +0200)
commitd8f7e1a60d01739a1d78db2b08603089c6cf7c8e
tree46f012cc8aa914fc470a0f73d15a03c7e62b0f07
parentb6e1bdca463a932c1ac02caa7d3e14bf39288e0c
media: qcom: camss: Fix invalid clock enable bit disjunction

define CSIPHY_3PH_CMN_CSI_COMMON_CTRL5_CLK_ENABLE BIT(7)

disjunction for gen2 ? BIT(7) : is a nop we are setting the same bit
either way.

Fixes: 4abb21309fda ("media: camss: csiphy: Move to hardcode CSI Clock Lane number")
Cc: stable@vger.kernel.org
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c