selftests/powerpc: EBB selftest for MMCR0 control for PMU SPRs in ISA v3.1
authorAthira Rajeev <atrajeev@linux.vnet.ibm.com>
Tue, 25 May 2021 13:51:43 +0000 (09:51 -0400)
committerMichael Ellerman <mpe@ellerman.id.au>
Wed, 16 Jun 2021 14:09:11 +0000 (00:09 +1000)
commitd81090ed44c0d15abf2b07663d5f0b9e5ba51525
tree8119f2165e397588cb71d9ee6de697b3f79febb2
parent45677c9aebe926192e59475b35a1ff35ff2d4217
selftests/powerpc: EBB selftest for MMCR0 control for PMU SPRs in ISA v3.1

With the MMCR0 control bit (PMCCEXT) in ISA v3.1, read access to
group B registers is restricted when MMCR0 PMCC=0b00. In other
platforms (like power9), the older behaviour works where group B
PMU SPRs are readable.

Patch creates a selftest which verifies that the test takes a
SIGILL when attempting to read PMU registers via helper function
"dump_ebb_state" for ISA v3.1.

Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
Tested-by: Nageswara R Sastry <rnsastry@linux.ibm.com <mailto:rnsastry@linux.ibm.com>>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/1621950703-1532-3-git-send-email-atrajeev@linux.vnet.ibm.com
tools/testing/selftests/powerpc/pmu/ebb/Makefile
tools/testing/selftests/powerpc/pmu/ebb/regs_access_pmccext_test.c [new file with mode: 0644]