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dt-bindings: riscv: Add xsfvfwmaccqqq ISA extension description
authorCyan Yang <cyan.yang@sifive.com>
Fri, 18 Apr 2025 05:32:36 +0000 (13:32 +0800)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 8 May 2025 18:01:44 +0000 (11:01 -0700)
commitd5ca02b25f5dbe44a25afe35cd75d49f1f0b9763
treea1439afa3db4438bd2bb4515f873249b7ced2fa2tree
parent1d91224394c92245942c402245370c4abb0fcbfbcommit | diff
dt-bindings: riscv: Add xsfvfwmaccqqq ISA extension description

Add "xsfvfwmaccqqq" ISA extension which is provided by SiFive for
matrix multiply accumulate instructions support.

Signed-off-by: Cyan Yang <cyan.yang@sifive.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250418053239.4351-10-cyan.yang@sifive.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Documentation/devicetree/bindings/riscv/extensions.yaml diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)