kvm: arm/arm64: Fix stage2_flush_memslot for 4 level page table
authorSuzuki K Poulose <suzuki.poulose@arm.com>
Wed, 26 Sep 2018 16:32:37 +0000 (17:32 +0100)
committerMarc Zyngier <marc.zyngier@arm.com>
Mon, 1 Oct 2018 12:08:41 +0000 (13:08 +0100)
commitd2db7773ba864df6b4e19643dfc54838550d8049
tree3237bdd2eba87ac3c5c112e936e642aac522fb32
parent6bf4ca7fbc85d80446ac01c0d1d77db4d91a6d84
kvm: arm/arm64: Fix stage2_flush_memslot for 4 level page table

So far we have only supported 3 level page table with fixed IPA of
40bits, where PUD is folded. With 4 level page tables, we need
to check if the PUD entry is valid or not. Fix stage2_flush_memslot()
to do this check, before walking down the table.

Acked-by: Christoffer Dall <cdall@kernel.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
virt/kvm/arm/mmu.c