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(parent: f441dd3) | patch
drm/amdgpu: Pin MMIO/DOORBELL BO's in GTT domain
authorRamesh Errabolu <Ramesh.Errabolu@amd.com>
Tue, 9 Nov 2021 05:44:16 +0000 (23:44 -0600)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 22 Nov 2021 19:45:01 +0000 (14:45 -0500)
commitd25e35bc26c3ca8cd728101545cfb3e86a5d7431
tree35b218ed8ba752734cb87db1eec22e841daf136ctree | snapshot
parentf441dd33db4a5ba306d507e70e97f4656d526e38commit | diff
drm/amdgpu: Pin MMIO/DOORBELL BO's in GTT  domain

MMIO/DOORBELL BOs encode control data and should be pinned in GTT
domain before enabling PCIe connected peer devices in accessing it

Signed-off-by: Ramesh Errabolu <Ramesh.Errabolu@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)