KVM: arm/arm64: vgic: Implement VGICv3 CPU interface access
authorVijaya Kumar K <Vijaya.Kumar@cavium.com>
Thu, 26 Jan 2017 14:20:51 +0000 (19:50 +0530)
committerMarc Zyngier <marc.zyngier@arm.com>
Mon, 30 Jan 2017 13:47:25 +0000 (13:47 +0000)
commitd017d7b0bd7ab32644d35666a6c4412daa0b0a1d
tree2e21087dde0969512442e0b70aa2ec318bef5aa2
parent5fb247d79c04240dce86c842976cde1edde7f7ed
KVM: arm/arm64: vgic: Implement VGICv3 CPU interface access

VGICv3 CPU interface registers are accessed using
KVM_DEV_ARM_VGIC_CPU_SYSREGS ioctl. These registers are accessed
as 64-bit. The cpu MPIDR value is passed along with register id.
It is used to identify the cpu for registers access.

The VM that supports SEIs expect it on destination machine to handle
guest aborts and hence checked for ICC_CTLR_EL1.SEIS compatibility.
Similarly, VM that supports Affinity Level 3 that is required for AArch64
mode, is required to be supported on destination machine. Hence checked
for ICC_CTLR_EL1.A3V compatibility.

The arch/arm64/kvm/vgic-sys-reg-v3.c handles read and write of VGIC
CPU registers for AArch64.

For AArch32 mode, arch/arm/kvm/vgic-v3-coproc.c file is created but
APIs are not implemented.

Updated arch/arm/include/uapi/asm/kvm.h with new definitions
required to compile for AArch32.

The version of VGIC v3 specification is defined here
Documentation/virtual/kvm/devices/arm-vgic-v3.txt

Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@cavium.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
arch/arm/include/uapi/asm/kvm.h
arch/arm/kvm/Makefile
arch/arm/kvm/vgic-v3-coproc.c [new file with mode: 0644]
arch/arm64/include/uapi/asm/kvm.h
arch/arm64/kvm/Makefile
arch/arm64/kvm/vgic-sys-reg-v3.c [new file with mode: 0644]
include/kvm/arm_vgic.h
virt/kvm/arm/vgic/vgic-kvm-device.c
virt/kvm/arm/vgic/vgic-mmio-v3.c
virt/kvm/arm/vgic/vgic-v3.c
virt/kvm/arm/vgic/vgic.h