mmc: sdhci-msm: Add calibration tuning for CDCLP533 circuit
authorRitesh Harjani <riteshh@codeaurora.org>
Mon, 21 Nov 2016 06:37:25 +0000 (12:07 +0530)
committerUlf Hansson <ulf.hansson@linaro.org>
Tue, 29 Nov 2016 08:05:19 +0000 (09:05 +0100)
commitcc392c583d0fdc33ac5eaade68a224927be40cbc
tree3235f14994d12f82baed1cdaa418412576174809
parentabf270e5c6261066650cf680106fe348d8603d1f
mmc: sdhci-msm: Add calibration tuning for CDCLP533 circuit

In HS400 mode a new RCLK is introduced on the interface for read data
transfers. The eMMC5.0 device transmits the read data to the host with
respect to rising and falling edges of RCLK. In order to ensure correct
operation of read data transfers in HS400 mode, the incoming RX data
needs to be sampled by delayed version of RCLK.

The CDCLP533 delay circuit shifts the RCLK by T/4. It needs to be
initialized, configured and enabled once during HS400 mode switch and
when operational voltage/clock is changed.

Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sdhci-msm.c