drm/i915/icl: Configure MG PHY gating for HDMI ports too
authorImre Deak <imre.deak@intel.com>
Fri, 2 Nov 2018 19:26:55 +0000 (21:26 +0200)
committerImre Deak <imre.deak@intel.com>
Mon, 5 Nov 2018 13:54:40 +0000 (15:54 +0200)
commitcb9ff519439bb79b4f917008f26e5000076d48a3
tree5c11db6e71768841b230ba447a13bb7e4d87a71c
parent857d828374cc84d07c7b94db2cf535aa517444dd
drm/i915/icl: Configure MG PHY gating for HDMI ports too

The MG PHY clock gating needs to be configured for Type C
static/fixed/legacy HDMI ports the same way it's configured for Type C
static/fixed/legacy and aternate mode DP ports, fix this.

Bspec: 4232, 21735
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Tested-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181102192656.4472-2-imre.deak@intel.com
drivers/gpu/drm/i915/intel_ddi.c
drivers/gpu/drm/i915/intel_dp.c
drivers/gpu/drm/i915/intel_drv.h