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PCI: qcom-ep: Gate Master AXI clock to MHI bus during L1SS
authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Wed, 14 Sep 2022 07:53:44 +0000 (13:23 +0530)
committerLorenzo Pieralisi <lpieralisi@kernel.org>
Wed, 5 Oct 2022 14:17:45 +0000 (16:17 +0200)
commitc457ac029e443faa5886f59f849e94701375b80f
tree8357ffc45cb1c254945259e464b797a89fe3ddbatree
parent6dbba2b53c3bcbbee849d2fa8cf6acc973ab2e81commit | diff
PCI: qcom-ep: Gate Master AXI clock to MHI bus during L1SS

During L1SS, gate the Master clock supplied to the MHI bus to save power.

Link: https://lore.kernel.org/r/20220914075350.7992-7-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
drivers/pci/controller/dwc/pcie-qcom-ep.c diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)