RISC-V: hwprobe: Add MISALIGNED_PERF key
authorEvan Green <evan@rivosinc.com>
Fri, 9 Aug 2024 21:44:43 +0000 (14:44 -0700)
committerPalmer Dabbelt <palmer@rivosinc.com>
Wed, 14 Aug 2024 20:13:23 +0000 (13:13 -0700)
commitc42e2f076769c9c1bc5f3f0aa1c2032558e76647
treeb8fc8045648f257153c2ca4ec40fe44a8aa76723
parent8400291e289ee6b2bf9779ff1c83a291501f017b
RISC-V: hwprobe: Add MISALIGNED_PERF key

RISCV_HWPROBE_KEY_CPUPERF_0 was mistakenly flagged as a bitmask in
hwprobe_key_is_bitmask(), when in reality it was an enum value. This
causes problems when used in conjunction with RISCV_HWPROBE_WHICH_CPUS,
since SLOW, FAST, and EMULATED have values whose bits overlap with
each other. If the caller asked for the set of CPUs that was SLOW or
EMULATED, the returned set would also include CPUs that were FAST.

Introduce a new hwprobe key, RISCV_HWPROBE_KEY_MISALIGNED_PERF, which
returns the same values in response to a direct query (with no flags),
but is properly handled as an enumerated value. As a result, SLOW,
FAST, and EMULATED are all correctly treated as distinct values under
the new key when queried with the WHICH_CPUS flag.

Leave the old key in place to avoid disturbing applications which may
have already come to rely on the key, with or without its broken
behavior with respect to the WHICH_CPUS flag.

Fixes: e178bf146e4b ("RISC-V: hwprobe: Introduce which-cpus flag")
Signed-off-by: Evan Green <evan@rivosinc.com>
Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/20240809214444.3257596-2-evan@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Documentation/arch/riscv/hwprobe.rst
arch/riscv/include/asm/hwprobe.h
arch/riscv/include/uapi/asm/hwprobe.h
arch/riscv/kernel/sys_hwprobe.c