PCI: Increase D3 delay for AMD Renoir/Cezanne XHCI
authorMarcin Bachry <hegel666@gmail.com>
Thu, 22 Jul 2021 02:58:58 +0000 (22:58 -0400)
committerSasha Levin <sashal@kernel.org>
Thu, 26 Aug 2021 12:35:56 +0000 (08:35 -0400)
commitb6672f67ec28131f043dc65906681634fbeea74d
tree105898275f39cb5707611555482442af085b1301
parenta69326e134d4ffa0d2d77bf1a4a62271c51c3051
PCI: Increase D3 delay for AMD Renoir/Cezanne XHCI

[ Upstream commit e0bff43220925b7e527f9d3bc9f5c624177c959e ]

The Renoir XHCI controller apparently doesn't resume reliably with the
standard D3hot-to-D0 delay.  Increase it to 20ms.

[Alex: I talked to the AMD USB hardware team and the AMD Windows team and
they are not aware of any HW errata or specific issues.  The HW works fine
in Windows.  I was told Windows uses a rather generous default delay of
100ms for PCI state transitions.]

Link: https://lore.kernel.org/r/20210722025858.220064-1-alexander.deucher@amd.com
Signed-off-by: Marcin Bachry <hegel666@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org
Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Prike Liang <prike.liang@amd.com>
Cc: Shyam Sundar S K <shyam-sundar.s-k@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/pci/quirks.c