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RISC-V: KVM: Add Sv57x4 mode support for G-stage
authorAnup Patel <apatel@ventanamicro.com>
Mon, 9 May 2022 05:13:39 +0000 (10:43 +0530)
committerAnup Patel <anup@brainfault.org>
Fri, 20 May 2022 03:39:04 +0000 (09:09 +0530)
commitb4bbb95ea6c41a616385902df81a66293f4b744c
treec9d418c9a33ea8c27db1e8155501ccb3b1236148tree | snapshot
parent26708234eb12e73a2a475296f562ba351fb39894commit | diff
RISC-V: KVM: Add Sv57x4 mode support for G-stage

Latest QEMU supports G-stage Sv57x4 mode so this patch extends KVM
RISC-V G-stage handling to detect and use Sv57x4 mode when available.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
arch/riscv/include/asm/csr.h diff | blob | blame | history
arch/riscv/kvm/main.c diff | blob | blame | history
arch/riscv/kvm/mmu.c diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)