dt-bindings: iio: adc: amlogic,meson-saradc: Add GXLX SoC compatible
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Sun, 30 Mar 2025 10:19:21 +0000 (12:19 +0200)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Tue, 22 Apr 2025 18:09:51 +0000 (19:09 +0100)
commitb2729cdf2bc0ea9d624d504fc61e5b6299629b6c
treef44b7c766311930dfef91170ced7dcd5559419bc
parent61f013df59f1d6326dcb6e1017171d7ee2b5a410
dt-bindings: iio: adc: amlogic,meson-saradc: Add GXLX SoC compatible

Add a compatible string for the GXLX SoC. It's very similar to GXL but
has three additional bits in MESON_SAR_ADC_REG12 for the three MPLL
clocks.

Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://patch.msgid.link/20250330101922.1942169-2-martin.blumenstingl@googlemail.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml