spi: dw-dma: Fix Tx DMA channel working too fast
authorSerge Semin <Sergey.Semin@baikalelectronics.ru>
Tue, 21 Jul 2020 20:39:51 +0000 (23:39 +0300)
committerMark Brown <broonie@kernel.org>
Tue, 21 Jul 2020 22:43:24 +0000 (23:43 +0100)
commitaffe93dd5b35bb0e7b0aa0505ae432dd0ac72c3f
tree02d7d2d0bb348246992a753aa20e0c9401df67cd
parented7815db70d17b1741883f2da8e1d80bc2efe517
spi: dw-dma: Fix Tx DMA channel working too fast

It turns out having a Rx DMA channel serviced with higher priority than
a Tx DMA channel is not enough to provide a well balanced DMA-based SPI
transfer interface. There might still be moments when the Tx DMA channel
is occasionally handled faster than the Rx DMA channel. That in its turn
will eventually cause the SPI Rx FIFO overflow if SPI bus speed is high
enough to fill the SPI Rx FIFO in before it's cleared by the Rx DMA
channel. That's why having the DMA-based SPI Tx interface too optimized
is the errors prone, so the commit 0b2b66514fc9 ("spi: dw: Use DMA max
burst to set the request thresholds") though being perfectly normal from
the standard functionality point of view implicitly introduced the problem
described above. In order to fix that the Tx DMA activity is intentionally
slowed down by limiting the SPI Tx FIFO depth with a value twice bigger
than the Tx burst length calculated earlier by the
dw_spi_dma_maxburst_init() method.

Fixes: 0b2b66514fc9 ("spi: dw: Use DMA max burst to set the request thresholds")
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Cc: Feng Tang <feng.tang@intel.com>
Link: https://lore.kernel.org/r/20200721203951.2159-1-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-dw-dma.c