clk: qcom: camcc-sm8550: Move PLL & clk configuration to really probe
authorJagadeesh Kona <quic_jkona@quicinc.com>
Fri, 30 May 2025 13:20:55 +0000 (18:50 +0530)
committerBjorn Andersson <andersson@kernel.org>
Tue, 10 Jun 2025 17:59:20 +0000 (12:59 -0500)
commitadb50c762f3a513a363d91722dbd8d1b4afc5f10
treea18d6915ec509fa379a917d37455d462d5bbfe55
parenteb65d754eb5eaeab7db87ce7e64dab27b7d156d8
clk: qcom: camcc-sm8550: Move PLL & clk configuration to really probe

Camera PLLs on SM8550 require both MMCX and MXC rails to be kept ON to
configure the PLLs properly. Hence move runtime power management, PLL
configuration and enabling critical clocks to qcom_cc_really_probe() which
ensures all required power domains are in enabled state before configuring
the PLLs or enabling the clocks.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Link: https://lore.kernel.org/r/20250530-videocc-pll-multi-pd-voting-v5-10-02303b3a582d@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
drivers/clk/qcom/camcc-sm8550.c