dt-bindings: clock: renesas,r9a09g057-cpg: Add USB2 PHY and GBETH PTP core clocks
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Mon, 7 Apr 2025 16:52:00 +0000 (17:52 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 22 Apr 2025 09:29:44 +0000 (11:29 +0200)
commitad227dab306543208a0658357a82712e678a06f4
tree6c3304b4dc539c65c32324e37ee40d6040a91cbd
parent3e4863d24818a41db42b4f2680715f204657839e
dt-bindings: clock: renesas,r9a09g057-cpg: Add USB2 PHY and GBETH PTP core clocks

Add definitions for USB2 PHY core clocks and Gigabit Ethernet PTP
reference core clocks in the R9A09G057 CPG DT bindings header file.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250407165202.197570-8-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
include/dt-bindings/clock/renesas,r9a09g057-cpg.h