drm/i915/gtt: disable 2M pages for pre-gen11
authorMatthew Auld <matthew.auld@intel.com>
Fri, 9 Aug 2019 19:34:56 +0000 (20:34 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Sat, 10 Aug 2019 12:19:00 +0000 (13:19 +0100)
commitaaa914cd1c6332950523c942988a2ccd7cc2f7d9
treea3e2e5b3337f8d73e8479d05b36cd4d97072975a
parent1feb7864b2cbd874a677ce04d61834d5664133ab
drm/i915/gtt: disable 2M pages for pre-gen11

We currently disable THP(Transparent-Huge-Pages) for our shmem objects
due to a performance regression with read BW in some internal
benchmarks. Given that this is our main source of 2M pages, there really
isn't much point in enabling 2M GTT pages, especially as that comes at
the cost of disabling the GTT cache. However from gen11 it looks like we
should hopefully see the HW issue resolved. Given this opt for only
enabling 2M GTT pages from gen11 onwards.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190809193456.3836-2-matthew.auld@intel.com
drivers/gpu/drm/i915/i915_pci.c