net/mlx5e: Use the correct lag ports number when creating TISes
authorSaeed Mahameed <saeedm@nvidia.com>
Sat, 16 Dec 2023 03:31:14 +0000 (19:31 -0800)
committerSaeed Mahameed <saeedm@nvidia.com>
Thu, 21 Dec 2023 00:54:24 +0000 (16:54 -0800)
commita7e7b40c4bc115dbf2a2bb453d7bbb2e0ea99703
treeb98370a8b8967d992dd781b6fe6ed2f8c66b3e9b
parentbee9705c679d0df8ee099e3c5312ac76f447848a
net/mlx5e: Use the correct lag ports number when creating TISes

The cited commit moved the code of mlx5e_create_tises() and changed the
loop to create TISes over MLX5_MAX_PORTS constant value, instead of
getting the correct lag ports supported by the device, which can cause
FW errors on devices with less than MLX5_MAX_PORTS ports.

Change that back to mlx5e_get_num_lag_ports(mdev).

Also IPoIB interfaces create there own TISes, they don't use the eth
TISes, pass a flag to indicate that.

Fixes: b25bd37c859f ("net/mlx5: Move TISes from priv to mdev HW resources")
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
drivers/net/ethernet/mellanox/mlx5/core/en.h
drivers/net/ethernet/mellanox/mlx5/core/en_common.c
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c
include/linux/mlx5/driver.h