irqchip/irq-mvebu-gicp: Add new driver for Marvell GICP
authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Wed, 21 Jun 2017 13:29:14 +0000 (15:29 +0200)
committerMarc Zyngier <marc.zyngier@arm.com>
Fri, 23 Jun 2017 08:14:57 +0000 (09:14 +0100)
commita68a63cb4dfc30e8a79b444aabc7747bb7621acf
tree845ab02ff38dd581ee50810af7142bcbed2141c8
parentf39a29bb5ca3f1c54fa677d9de17a09079b7e898
irqchip/irq-mvebu-gicp: Add new driver for Marvell GICP

This commit adds a simple driver for the Marvell GICP, a hardware unit
that converts memory writes into GIC SPI interrupts. The driver provides
a number of functions to the ICU driver to allocate GICP interrupts, and
get the physical addresses that the ICUs should write to to set/clear
interrupts.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
drivers/irqchip/Kconfig
drivers/irqchip/Makefile
drivers/irqchip/irq-mvebu-gicp.c [new file with mode: 0644]
drivers/irqchip/irq-mvebu-gicp.h [new file with mode: 0644]